Experiments in electronic basics by means of Buchla, David M. [Prentice corridor, 2008]...
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Extra resources for Experiments in Digital Fundamentals Tenth Edition
9. Place a fault in the circuit of Figure 2-6(b) by removing the wire that is connected to pin 5, the input of the lower inverter. Now momentarily touch the input, pin 3, to ground. Test the logic levels at each point in the circuit and record them in Table 2-2. 10. An open circuit on the input of TTL logic has an invalid logic level. Even though it is invalid, it acts as a logic HIGH at the input to the gate. ) Repeat Step 9 but use a DMM to measure the actual voltages at each pin. Record the data in Table 2-2.
A useful method of dealing with negative logic is to label the signal function with a bar written over the label to indicate that the signal is LOW when the stated condition is true. Figure 4-2 shows some examples of this logic, called assertion-level logic. You should be aware that manufacturers are not always consistent in the way labels are applied to diagrams and function tables. Assertion-level logic is frequently shown to indi cate an action. As shown in Figure 4-2, the action to read (R) is asserted (1) when the mput line is HIGH; the opposite action is to write (W), which is asserted (0) when the line is LOW.
The circuit in this experiment is a simple logic probe. Logic probes are useful for detecting the presence of a HIGH or a LOW logic level in a circuit. The logic probe in this experiment is de signed only to illustrate the use of this tool and the wiring of integrated circuits. 0 kfl resistor) and the bottom inverter is pulled LOW (through the 330 fl resistor). As a result, both outputs are HIGH and neither LED is on. (A LOW is required to turn on either LED). 0 V, the voltage at the input of the lower inverter is inter preted as a logic HIGH through diode £>2- As a *Appendix A contains connection diagrams as found in manufacturers’ logic data books and on their websites.